13th IEEE Symposium on Computer Arithmetic (ARITH-13 '97) Multiprecision Division on an 8-bit Processor Asilomar, CA March 06-March 09 ISBN: 0-8186-7846-1
Small processors can be especially useful in massively parallel architectures. This paper considers multiprecision division algorithms on an 8-bit processor (the Kestrel processor, currently in fabrication) that includes a small amount of memory and an 8-bit multiplier. We evaluate several variations of the Newton-Raphson reciprocal approximation methods for use with division. Our final single-precision algorithm requires 41 cycles to divide two 24-bit numbers to produce a 26-bit result. The double-precision version requires 98 cycles to divide two 53-bit numbers to produce a 55-bit result. This low cycle count is the result of several techniques including low-precision arithmetic, early introduction of dividends, and simple yet good initial reciprocal estimates.
Citation:
Eric Rice, Richard Hughey, "Multiprecision Division on an 8-bit Processor," arith, pp.74, 13th IEEE Symposium on Computer Arithmetic (ARITH-13 '97), 1997 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||