loading...
 This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
12th IEEE Symposium on Computer Arithmetic (ARITH-12 '95)
Hardware Design and Arithmetic Algorithms for a Variable-Precision, Interval Arithmetic Coprocessor
Bath, England
July 19-July 21
ISBN: 0-8186-7089-4
Michael J. Schulte, The University of Texas at Austin
Earl E. Swartzlander, Jr., The University of Texas at Austin
This paper presents the hardware design and arithmetic algorithms for a coprocessor that performs variable-precision, interval arithmetic. The coprocessor gives the programmer the ability to specify the precision of the computation, determine the accuracy of the results, and recompute inaccurate results with higher precision. Direct hardware support and efficient arithmetic algorithms for variable-precision, interval arithmetic greatly improve the speed, accuracy and reliability of numerical computations Performance estimates indicate that the coprocessor is 200 to 1,000 times faster than a software package for variable-precision, interval arithmetic. The coprocessor can be implemented on a single chip with a cycle time that is comparable to IEEE double-precision floating point coprocessors.
Index Terms:
Interval arithmetic, precision, computer arithmetic, coprocessor, hardware, numerical computations, arithmetic algorithms
Citation:
Michael J. Schulte, Earl E. Swartzlander, Jr., "Hardware Design and Arithmetic Algorithms for a Variable-Precision, Interval Arithmetic Coprocessor," arith, pp.222, 12th IEEE Symposium on Computer Arithmetic (ARITH-12 '95), 1995
Usage of this product signifies your acceptance of the Terms of Use.