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2008 Third International Conference on Availability, Reliability and Security
Analyzing fault effects in the 32-bit OpenRISC 1200 microprocessor
March 04-March 07
ISBN: 978-0-7695-3102-1
ASCII Text
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Nima Mehdizadeh, Mohammad Shokrolah-Shirazi, Seyed Ghassem Miremadi, "Analyzing fault effects in the 32-bit OpenRISC 1200 microprocessor," Availability, Reliability and Security, International Conference on, pp. 648-652, 2008 Third International Conference on Availability, Reliability and Security, 2008.
 
 
BibTex
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@article{ 10.1109/ARES.2008.55,
author = {Nima Mehdizadeh and Mohammad Shokrolah-Shirazi and Seyed Ghassem Miremadi},
title = {Analyzing fault effects in the 32-bit OpenRISC 1200 microprocessor},
journal ={Availability, Reliability and Security, International Conference on},
volume = {0},
year = {2008},
isbn = {978-0-7695-3102-1},
pages = {648-652},
doi = {http://doi.ieeecomputersociety.org/10.1109/ARES.2008.55},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
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TY - CONF
JO - Availability, Reliability and Security, International Conference on
TI - Analyzing fault effects in the 32-bit OpenRISC 1200 microprocessor
SN - 978-0-7695-3102-1
SP648
EP652
A1 - Nima Mehdizadeh,
A1 - Mohammad Shokrolah-Shirazi,
A1 - Seyed Ghassem Miremadi,
PY - 2008
KW - null
VL - 0
JA - Availability, Reliability and Security, International Conference on
ER -
 
This paper presents an analysis of the effects and propagation of faults in the open-core 32-bit OpenRISC 1200 microprocessor. The analysis is based on a total of 13,000 transient faults injected into 65 parts of the CPU module in the OpenRISC 1200 core described at the RTL model. A comparison of the effects of faults on the various parts of the CPU including the pipeline’s registers, the CPU component such as the register file, the control unit, and the ALU, and the data and address buses is done. It is shown that about 30%, 40% and 27% of injected faults terminated in address, data, and control errors respectively. About 28% of all injected faults resulted in failures.
Citation:
Nima Mehdizadeh, Mohammad Shokrolah-Shirazi, Seyed Ghassem Miremadi, "Analyzing fault effects in the 32-bit OpenRISC 1200 microprocessor," ares, pp.648-652, 2008 Third International Conference on Availability, Reliability and Security, 2008
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