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12th Asia-Pacific Software Engineering Conference (APSEC'05)
A Temporal Logic for Input Output Symbolic Transition Systems
Taipei, Taiwan
December 15-December 17
ISBN: 0-7695-2465-6
Marc Aiguier, LaMI-Universite d?E?vry, France
Pascale Le Gall, LaMI-Universite d?E?vry, France
Delphine Longuet, LaMI-Universite d?E?vry, France
Assia Touil, CEA/LIST Saclay, Yvette France
In this paper, we present a temporal logic called F whose interpretation is over Input Output Symbolic Transition Systems (IOSTS). IOSTS extend transition systems to communications and data in order to tackle communications with system environment.F is then defined as an extension of temporal logic CTL* (a temporal logic which mixes together the features of Linear Temporal Logic (LTL) and Computational Temporal Logic (CTL)). Three basic properties are established on F: adequacy and preservation of properties along synchronized product and IOSTS refinement.
Index Terms:
input output symbolic transition systems, temporal logic, strong bisimulation, refinement, adequacy
Citation:
Marc Aiguier, Pascale Le Gall, Delphine Longuet, Assia Touil, "A Temporal Logic for Input Output Symbolic Transition Systems," apsec, pp.43-50, 12th Asia-Pacific Software Engineering Conference (APSEC'05), 2005
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