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1997 Advances in Parallel and Distributed Computing Conference (APDC '97)
A New Architecture For Branch-Intensive Loops
Shanghai, CHINA
March 19-March 21
ISBN: 0-8186-7876-3
Zhizhong Tang, Tsinghua University
Chihong Zhang, Tsinghua University
Sifei Lvand Tao Yu, Tsinghua University
A new VLIW architecture, called GPMB(Global Pipelining of Multi-Branch), is discussed in this paper. The GPMB architecture can handle branch-intensive programs efficiently. With the concept of next address Function, GPMB regards branching as correctly calculating the next address. The next address function is implemented by hardware and software in GPMB. A brief description of GPMB and a detailed example are included. A comparison with other architectures is also presented in this paper.
Index Terms:
software pipelining, optimizing schedule, branch processing.
Citation:
Zhizhong Tang, Chihong Zhang, Sifei Lvand Tao Yu, "A New Architecture For Branch-Intensive Loops," apdc, pp.241, 1997 Advances in Parallel and Distributed Computing Conference (APDC '97), 1997
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