Ion implantation process can be used to convert enhancement to depletion NMOS transistor. This paper describe implantation parameters such as dose and energy, play a key role in lowering down the turn “ON” voltage of transistor to ~-1V compared to 0.7V as a conventional (enhancement) transistor. The conversion is carried out using “Silvaco” process simulator and actual fabrication experiment using 0.5um CMOS process technology. Extensive results are obtained from both actual experimentation as well as simulation of the processes involved.??A comparison between experiment and process simulation result deduce that almost 90% of the data are matched.