33rd Applied Imagery Pattern Recognition Workshop (AIPR'04) Real Time Texture Classification using Field Programmable Gate Arrays Cosmos Club, Washington, DC October 13-October 15 ISBN: 0-7695-2250-5
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/AIPR.2004.38
In this paper we present a novel hardware / software approach to implement a highly accurate texture classification algorithm. We propose the use of field programmable gate arrays (FPGAs) to efficiently compute multiple convolutions in parallel that are required by the spectral histogram representation we employ. The combination of custom hardware and software allows us to have a classifier that is able to achieve results of over 99% accuracy at a rate of roughly 6000 image classifications per second on a challenging real texture dataset.
Citation:
Geoffrey Wall, Faizal Iqbal, Jason Isaacs, Xiuwen Liu, Simon Foo, "Real Time Texture Classification using Field Programmable Gate Arrays," aipr, pp.130-135, 33rd Applied Imagery Pattern Recognition Workshop (AIPR'04), 2004 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||