21st International Conference on Advanced Networking and Applications (AINA '07) Modeling and Analysis of Interrupt Disable-Enable Scheme Niagara Falls, Ontario, Canada May 21-May 23 ISBN: 0-7695-2846-5
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/AINA.2007.92
System performance of Gigabit network hosts can severely be degraded due to interrupt overhead caused by heavy incoming traffic. One of the most popular solutions to mitigate such overhead is interrupt disabling and then enabling. In this solution, interrupt overhead is significantly reduced by disabling interrupts and only re-enabling them after processing all queued packets. In this paper we investigate analytically the performance of the scheme of interrupt disabling and enabling and compare it with normal interruption and interrupt coalescing. The system performance is analyzed and compared in terms of throughput, latency, and CPU availability for user applications.
Citation:
K. Salah, K. Elbadawi, "Modeling and Analysis of Interrupt Disable-Enable Scheme," aina, pp.1000-1005, 21st International Conference on Advanced Networking and Applications (AINA '07), 2007 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||