FPGA-Based Lookup Circuit for Session-Based IP Packet Classification

A
AHS
2007
Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007)
Abstract - FPGA-Based Lookup Circuit for Session-Based IP Packet Classification

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Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007)

University of Edinburgh, Scotland, United Kingdom

August 05-August 08

ISBN: 0-7695-2866-X

	ASCII Text	x
	Motasem Abdelghani, Sakir Sezer, Emi Garcia, Jun Mu, Ciaran Toal, "FPGA-Based Lookup Circuit for Session-Based IP Packet Classification," Adaptive Hardware and Systems, NASA/ESA Conference on, pp. 619-624, Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007.

	BibTex	x
	@article{ 10.1109/AHS.2007.57, author = {Motasem Abdelghani and Sakir Sezer and Emi Garcia and Jun Mu and Ciaran Toal}, title = {FPGA-Based Lookup Circuit for Session-Based IP Packet Classification}, journal ={Adaptive Hardware and Systems, NASA/ESA Conference on}, volume = {0}, year = {2007}, isbn = {0-7695-2866-X}, pages = {619-624}, doi = {http://doi.ieeecomputersociety.org/10.1109/AHS.2007.57}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Adaptive Hardware and Systems, NASA/ESA Conference on TI - FPGA-Based Lookup Circuit for Session-Based IP Packet Classification SN - 0-7695-2866-X SP619 EP624 A1 - Motasem Abdelghani, A1 - Sakir Sezer, A1 - Emi Garcia, A1 - Jun Mu, A1 - Ciaran Toal, PY - 2007 KW - null VL - 0 JA - Adaptive Hardware and Systems, NASA/ESA Conference on ER -

Motasem Abdelghani, Queen's University Belfast

Sakir Sezer, Queen's University Belfast

Emi Garcia, Queen's University Belfast

Jun Mu, Queen's University Belfast

Ciaran Toal, Queen's University Belfast

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/AHS.2007.57

In this paper, we present the architecture and implementation of an FPGA-based lookup circuit for a session-based IP packet classifier. The concept of session-based packet classification is summarized and the difference between the traditional- and sessionbased- classification is discussed. A preliminary hardware based architecture customised for FPGA technology is explored and its implementation using Altera Cyclone II technology is outlined. A detailed circuit analysis is presented.

Citation:

Motasem Abdelghani, Sakir Sezer, Emi Garcia, Jun Mu, Ciaran Toal, "FPGA-Based Lookup Circuit for Session-Based IP Packet Classification," ahs, pp.619-624, Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007

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