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Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007)
Enhancements of reconfigurable System-on-Chip Data Processing Units for Space Application
University of Edinburgh, Scotland, United Kingdom
August 05-August 08
ISBN: 0-7695-2866-X
B. Osterloh, IDA TU Braunschweig, Hans-Sommer-Str.66, D-38106 Braunschweig, Germany
H. Michalik, IDA TU Braunschweig, Hans-Sommer-Str.66, D-38106 Braunschweig, Germany
B. Fiethe, IDA TU Braunschweig, Hans-Sommer-Str.66, D-38106 Braunschweig, Germany
F. Bubenhagen, IDA TU Braunschweig, Hans-Sommer-Str.66, D-38106 Braunschweig, Germany
Data Processing Units (DPUs) in space application as a reconfigurable System-on-Chip solution (SoC) based on a FPGA have been already successfully demonstrated in the Venus Express mission, providing the capability of flexibility and reliability for system design. An enhanced reconfigurable System-on-Chip solution for future space missions also includes the ability to re-program hardware functions even in-flight. The reconfigurable System-on- Chip solution is introduced and the flexibility and reliability of this approach are outlined. Furthermore the requirements for an enhanced SoC design with in-flight reconfigurability for space application are presented.
Citation:
B. Osterloh, H. Michalik, B. Fiethe, F. Bubenhagen, "Enhancements of reconfigurable System-on-Chip Data Processing Units for Space Application," ahs, pp.258-262, Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007
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