Enhancements of reconfigurable System-on-Chip Data Processing Units for Space Application

A
AHS
2007
Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007)
Abstract - Enhancements of reconfigurable System-on-Chip Data Processing Units for Space Application

	This Article
	Subscribers, please Login Purchase article: $19 PDF IEEE Xplore Subscribers RSS feed
	Share
	Email this Article to a friend
	Bibliographic References
	ASCII Text BibTex RefWorks Procite/RefMan
	Add to:
	Digg Furl Spurl Blink Simpy Google Del.icio.us Y!MyWeb
	Search
	Similar Articles Articles by B. Osterloh Articles by H. Michalik Articles by B. Fiethe Articles by F. Bubenhagen

Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007)

University of Edinburgh, Scotland, United Kingdom

August 05-August 08

ISBN: 0-7695-2866-X

	ASCII Text	x
	B. Osterloh, H. Michalik, B. Fiethe, F. Bubenhagen, "Enhancements of reconfigurable System-on-Chip Data Processing Units for Space Application," Adaptive Hardware and Systems, NASA/ESA Conference on, pp. 258-262, Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007.

	BibTex	x
	@article{ 10.1109/AHS.2007.47, author = {B. Osterloh and H. Michalik and B. Fiethe and F. Bubenhagen}, title = {Enhancements of reconfigurable System-on-Chip Data Processing Units for Space Application}, journal ={Adaptive Hardware and Systems, NASA/ESA Conference on}, volume = {0}, year = {2007}, isbn = {0-7695-2866-X}, pages = {258-262}, doi = {http://doi.ieeecomputersociety.org/10.1109/AHS.2007.47}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Adaptive Hardware and Systems, NASA/ESA Conference on TI - Enhancements of reconfigurable System-on-Chip Data Processing Units for Space Application SN - 0-7695-2866-X SP258 EP262 A1 - B. Osterloh, A1 - H. Michalik, A1 - B. Fiethe, A1 - F. Bubenhagen, PY - 2007 KW - null VL - 0 JA - Adaptive Hardware and Systems, NASA/ESA Conference on ER -

B. Osterloh, IDA TU Braunschweig, Hans-Sommer-Str.66, D-38106 Braunschweig, Germany

H. Michalik, IDA TU Braunschweig, Hans-Sommer-Str.66, D-38106 Braunschweig, Germany

B. Fiethe, IDA TU Braunschweig, Hans-Sommer-Str.66, D-38106 Braunschweig, Germany

F. Bubenhagen, IDA TU Braunschweig, Hans-Sommer-Str.66, D-38106 Braunschweig, Germany

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/AHS.2007.47

Data Processing Units (DPUs) in space application as a reconfigurable System-on-Chip solution (SoC) based on a FPGA have been already successfully demonstrated in the Venus Express mission, providing the capability of flexibility and reliability for system design. An enhanced reconfigurable System-on-Chip solution for future space missions also includes the ability to re-program hardware functions even in-flight. The reconfigurable System-on- Chip solution is introduced and the flexibility and reliability of this approach are outlined. Furthermore the requirements for an enhanced SoC design with in-flight reconfigurability for space application are presented.

Citation:

B. Osterloh, H. Michalik, B. Fiethe, F. Bubenhagen, "Enhancements of reconfigurable System-on-Chip Data Processing Units for Space Application," ahs, pp.258-262, Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007

Peer Review Notice | Give Us Feedback

Usage of this product signifies your acceptance of the Terms of Use.