A Reconfigurable Arithmetic Data-path Based On Regular Interconnection

A
AHS
2007
Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007)
Abstract - A Reconfigurable Arithmetic Data-path Based On Regular Interconnection

	This Article
	Subscribers, please Login Purchase article: $19 PDF IEEE Xplore Subscribers RSS feed
	Share
	Email this Article to a friend
	Bibliographic References
	ASCII Text BibTex RefWorks Procite/RefMan
	Add to:
	Digg Furl Spurl Blink Simpy Google Del.icio.us Y!MyWeb
	Search
	Similar Articles Articles by Sotiris Articles by George Economakos Articles by Kiamal Pekmestzi

Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007)

University of Edinburgh, Scotland, United Kingdom

August 05-August 08

ISBN: 0-7695-2866-X

	ASCII Text	x
	Sotiris , George Economakos, Kiamal Pekmestzi, "A Reconfigurable Arithmetic Data-path Based On Regular Interconnection," Adaptive Hardware and Systems, NASA/ESA Conference on, pp. 342-349, Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007.

	BibTex	x
	@article{ 10.1109/AHS.2007.16, author = {Sotiris and George Economakos and Kiamal Pekmestzi}, title = {A Reconfigurable Arithmetic Data-path Based On Regular Interconnection}, journal ={Adaptive Hardware and Systems, NASA/ESA Conference on}, volume = {0}, year = {2007}, isbn = {0-7695-2866-X}, pages = {342-349}, doi = {http://doi.ieeecomputersociety.org/10.1109/AHS.2007.16}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Adaptive Hardware and Systems, NASA/ESA Conference on TI - A Reconfigurable Arithmetic Data-path Based On Regular Interconnection SN - 0-7695-2866-X SP342 EP349 A1 - Sotiris , A1 - George Economakos, A1 - Kiamal Pekmestzi, PY - 2007 KW - null VL - 0 JA - Adaptive Hardware and Systems, NASA/ESA Conference on ER -

Sotiris, National Technical University of Athens

George Economakos, National Technical University of Athens

Kiamal Pekmestzi, National Technical University of Athens

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/AHS.2007.16

In this paper a novel coarse grained reconfigurable arithmetic unit (RAU) is introduced. The RAU?s design is based on a technique that inlines flexibility into custom Carry-Save-Arithmetic (CSA) circuits exploiting a stable and canonical interconnection scheme. The reconfigurable architecture prototype is presented. Two mapping strategies of DSP algorithms onto the proposed unit, are also analyzed. Experimental results report an average latency reduction of 32.63% and of 40% compared with datapaths structured by primitive computational resources, using the first and the second mapping strategy respectively.

Citation:

Sotiris , George Economakos, Kiamal Pekmestzi, "A Reconfigurable Arithmetic Data-path Based On Regular Interconnection," ahs, pp.342-349, Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007

Peer Review Notice | Give Us Feedback

Usage of this product signifies your acceptance of the Terms of Use.