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Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007)
Trace algorithms for deeply integrated complex and hybrid SoCs
University of Edinburgh, Scotland, United Kingdom
August 05-August 08
ISBN: 0-7695-2866-X
A.B.T. Hopkins, University of Essex
K.D. McDonald-Maier, University of Essex
Deeply integrated System-on-Chips (SoCs) are now the de-facto solution in realizing the hard real-time control systems that underlay today?s advanced products, and real-time tracing is the established means of debugging such systems. This manuscript reviews the techniques used by the leading trace solutions and presents empirical measurement results to evaluate their performance so that their suitability for next generation SoCs can be reliably assessed. Its findings are that current solutions are focused mainly on single processor devices and fail to provide sufficient bandwidth for multiple processor SoCs operating at higher peak clock frequencies. To support these new higher performance devices, novel techniques are required that boost performance; the practicality of more radical developments in this area are discussed.
Citation:
A.B.T. Hopkins, K.D. McDonald-Maier, "Trace algorithms for deeply integrated complex and hybrid SoCs," ahs, pp.641-646, Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007
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