First NASA/ESA Conference on Adaptive Hardware and Systems (AHS'06) VLSI Design IP Protection: Solutions, New Challenges, and Opportunities Istanbul, Turkey June 15-June 18 ISBN: 0-7695-2614-4
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/AHS.2006.77
It has been a decade since the need of VLSI design intellectual property (IP) protection was identified [1,2]. The goals of IP protection are 1) to enable IP providers to protect their IPs against unauthorized use, 2) to protect all types of design data used to produce and deliver IPs, 3) to detect the use of IPs, and 4) to trace the use of IPs [3]. There are significant advances from both industry and academic towards these goals. However, do we have solutions to achieve all these goals? What are the current state-of-the-art IP protection techniques? Do they meet the protection requirement designers sought for? What are the (new) challenges and is there any feasible answer to them in the foreseeable future? This paper addresses these questions and provides possible solutions mainly from academia point of view. Several successful industry practice and ongoing efforts are also discussed briefly
Citation:
Lin Yuan, Gang Qu, Lahouari Ghout, Ahmed Bouridane, "VLSI Design IP Protection: Solutions, New Challenges, and Opportunities," ahs, pp.469-476, First NASA/ESA Conference on Adaptive Hardware and Systems (AHS'06), 2006 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||