We present a simulation of circuits in a faulty field programmable gate array where reconfiguration circuitry is built-in. Diagnosis is implemented as triple redundant circuitry with majority voting and self-repair is achieved via sub-circuit chromosone mutation. Both control circuitry and our device function (full adder) circuitry is faultmanaged. We evaluate our system with respect to diagnosis reliability, reconfiguration performance and bus density. An implementation of our model could increase the survivability of critical engineering applications.