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First NASA/ESA Conference on Adaptive Hardware and Systems (AHS'06)
An FPGA Implemented Processor Architecture with Adaptive Resolution
Istanbul, Turkey
June 15-June 18
ISBN: 0-7695-2614-4
ASCII Text
x 
 
Jim Torresen, Jonas Jakobsen, "An FPGA Implemented Processor Architecture with Adaptive Resolution," Adaptive Hardware and Systems, NASA/ESA Conference on, pp. 386-389, First NASA/ESA Conference on Adaptive Hardware and Systems (AHS'06), 2006.
 
 
BibTex
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@article{ 10.1109/AHS.2006.23,
author = {Jim Torresen and Jonas Jakobsen},
title = {An FPGA Implemented Processor Architecture with Adaptive Resolution},
journal ={Adaptive Hardware and Systems, NASA/ESA Conference on},
volume = {0},
year = {2006},
isbn = {0-7695-2614-4},
pages = {386-389},
doi = {http://doi.ieeecomputersociety.org/10.1109/AHS.2006.23},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Adaptive Hardware and Systems, NASA/ESA Conference on
TI - An FPGA Implemented Processor Architecture with Adaptive Resolution
SN - 0-7695-2614-4
SP386
EP389
A1 - Jim Torresen,
A1 - Jonas Jakobsen,
PY - 2006
KW - null
VL - 0
JA - Adaptive Hardware and Systems, NASA/ESA Conference on
ER -
 
Jim Torresen, University of Oslo, Norway
Jonas Jakobsen, University of Oslo, Norway
Reconfigurable software has been applied for a long time. Reconfigurable technology also provides possibility for reconfiguring hardware but this has not been much exploited so far. In this paper, a flexible processor architecture is proposed that allows for variable resolution in data variables at run-time. Experiments are undertaken for an image processing task where the results show that the approach is beneficial.
Citation:
Jim Torresen, Jonas Jakobsen, "An FPGA Implemented Processor Architecture with Adaptive Resolution," ahs, pp.386-389, First NASA/ESA Conference on Adaptive Hardware and Systems (AHS'06), 2006
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