Seventh International Conference on Application of Concurrency to System Design (ACSD 2007) Output-Determinacy and Asynchronous Circuit Synthesis Bratislava, Slovak Republic July 10-July 13 ISBN: 0-7695-2902-X
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ACSD.2007.57
Signal Transition Graphs (STG) are a formalism for the description of asynchronous circuit behaviour. In this paper we propose (and justify) a formal semantics of nondeterministic STGs with dummies and OR-causality. For this, we introduce the concept of output-determinacy, which is a relaxation of determinism, and argue that it is reasonable and useful in the speed-independent context. With our theory we improve an STG decomposition algorithm, which can alleviate state explosion.
Index Terms:
output-determinacy, decomposition, asynchronous circuits, STG, OR-causality.
Citation:
Victor Khomenko, Mark Schaefer, Walter Vogler, "Output-Determinacy and Asynchronous Circuit Synthesis," acsd, pp.147-156, Seventh International Conference on Application of Concurrency to System Design (ACSD 2007), 2007 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||