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Sixth International Conference on Application of Concurrency to System Design (ACSD'06)
Verification of a Data Synchronization Circuit For All Time
Turku, Finland
June 28-June 30
ISBN: 0-7695-2556-3
ASCII Text
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Geoffrey M. Brown, "Verification of a Data Synchronization Circuit For All Time," Application of Concurrency to System Design, International Conference on, pp. 217-228, Sixth International Conference on Application of Concurrency to System Design (ACSD'06), 2006.
 
 
BibTex
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@article{ 10.1109/ACSD.2006.35,
author = {Geoffrey M. Brown},
title = {Verification of a Data Synchronization Circuit For All Time},
journal ={Application of Concurrency to System Design, International Conference on},
volume = {0},
year = {2006},
issn = {1550-4808},
pages = {217-228},
doi = {http://doi.ieeecomputersociety.org/10.1109/ACSD.2006.35},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Application of Concurrency to System Design, International Conference on
TI - Verification of a Data Synchronization Circuit For All Time
SN - 1550-4808
SP217
EP228
A1 - Geoffrey M. Brown,
PY - 2006
KW - null
VL - 0
JA - Application of Concurrency to System Design, International Conference on
ER -
 
Geoffrey M. Brown, Indiana University
This paper presents a model and automated proof for a synchronizer circuit that is commonly used to reliably transfer data across clock domains. In contrast with previous work, this paper describes a proof that is valid for all clock rates and phases meeting modest constraints. Furthermore, the proof was realized with an existing model checker SAL.
Citation:
Geoffrey M. Brown, "Verification of a Data Synchronization Circuit For All Time," acsd, pp.217-228, Sixth International Conference on Application of Concurrency to System Design (ACSD'06), 2006
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