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Resizing Rules for MOS Analog-Design Reuse
March/April 2002 (vol. 19 no. 2)
pp. 50-58
ASCII Text
x 
 
Carlos Galup-Montoro, Márcio Cherem Schneider, Rafael Matos Coitinho, "Resizing Rules for MOS Analog-Design Reuse," IEEE Design and Test of Computers, vol. 19, no. 2, pp. 50-58, March/April, 2002.
 
 
BibTex
x
 
@article{ 10.1109/54.990442,
author = {Carlos Galup-Montoro and Márcio Cherem Schneider and Rafael Matos Coitinho},
title = {Resizing Rules for MOS Analog-Design Reuse},
journal ={IEEE Design and Test of Computers},
volume = {19},
number = {2},
issn = {0740-7475},
year = {2002},
pages = {50-58},
doi = {http://doi.ieeecomputersociety.org/10.1109/54.990442},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Design and Test of Computers
TI - Resizing Rules for MOS Analog-Design Reuse
IS - 2
SN - 0740-7475
SP50
EP58
EPD - 50-58
A1 - Carlos Galup-Montoro,
A1 - Márcio Cherem Schneider,
A1 - Rafael Matos Coitinho,
PY - 2002
VL - 19
JA - IEEE Design and Test of Computers
ER -
 

The migration of an analog circuit to a new technology usually requires a complete redesign. With the procedure presented here, designers can calculate parameters for a given circuit in a new technology, starting from the same design in an earlier technology. The procedure's simple resizing rules have been verified with standard MOSFET simulation models.

Citation:
Carlos Galup-Montoro, Márcio Cherem Schneider, Rafael Matos Coitinho, "Resizing Rules for MOS Analog-Design Reuse," IEEE Design and Test of Computers, vol. 19, no. 2, pp. 50-58, Mar./Apr. 2002, doi:10.1109/54.990442
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