Improving SoC Design Quality through a Reproducible Design Flow

Design&Test
2002
Issue No. 1 - January/February
Abstract - Improving SoC Design Quality through a Reproducible Design Flow

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January/February 2002 (vol. 19 no. 1)

pp. 76-83

	ASCII Text	x
	Philippe Magarshack, "Improving SoC Design Quality through a Reproducible Design Flow," IEEE Design and Test of Computers, vol. 19, no. 1, pp. 76-83, January/February, 2002.

	BibTex	x
	@article{ 10.1109/54.980055, author = {Philippe Magarshack}, title = {Improving SoC Design Quality through a Reproducible Design Flow}, journal ={IEEE Design and Test of Computers}, volume = {19}, number = {1}, issn = {0740-7475}, year = {2002}, pages = {76-83}, doi = {http://doi.ieeecomputersociety.org/10.1109/54.980055}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - MGZN JO - IEEE Design and Test of Computers TI - Improving SoC Design Quality through a Reproducible Design Flow IS - 1 SN - 0740-7475 SP76 EP83 EPD - 76-83 A1 - Philippe Magarshack, PY - 2002 VL - 19 JA - IEEE Design and Test of Computers ER -

Philippe Magarshack

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/54.980055

In his keynote speech at the Second IEEE International Symposium on Quality Electronic Design in March 2001, Philippe Magarshack examined the dynamics of system-on-a-chip design and addressed a fundamental question: Is there a reproducible process for achieving the right design at the right time?

Citation:

Philippe Magarshack, "Improving SoC Design Quality through a Reproducible Design Flow," IEEE Design and Test of Computers, vol. 19, no. 1, pp. 76-83, Jan./Feb. 2002, doi:10.1109/54.980055

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