DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/54.970420
Addressing fundamental challenges to designing high-performance ICs in nanometer-scale technologies, the authors advocate a flexible approach to limiting both dynamic and static power. They recommend global-signaling strategies to curb communication power requirements and thermal management techniques to ease the burden on packaging.
Citation:
Dennis Sylvester, Himanshu Kaul, "Power-Driven Challenges in Nanometer Design," IEEE Design and Test of Computers, vol. 18, no. 6, pp. 12-22, Nov./Dec. 2001, doi:10.1109/54.970420 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||