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Very Low Cost Testers: Opportunities and Challenges
September/October 2001 (vol. 18 no. 5)
pp. 60-69
ASCII Text
x 
 
Jay Bedsole, Rajesh Raina, Al Crouch, Magdy S. Abadir, "Very Low Cost Testers: Opportunities and Challenges," IEEE Design and Test of Computers, vol. 18, no. 5, pp. 60-69, September/October, 2001.
 
 
BibTex
x
 
@article{ 10.1109/54.953273,
author = {Jay Bedsole and Rajesh Raina and Al Crouch and Magdy S. Abadir},
title = {Very Low Cost Testers: Opportunities and Challenges},
journal ={IEEE Design and Test of Computers},
volume = {18},
number = {5},
issn = {0740-7475},
year = {2001},
pages = {60-69},
doi = {http://doi.ieeecomputersociety.org/10.1109/54.953273},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Design and Test of Computers
TI - Very Low Cost Testers: Opportunities and Challenges
IS - 5
SN - 0740-7475
SP60
EP69
EPD - 60-69
A1 - Jay Bedsole,
A1 - Rajesh Raina,
A1 - Al Crouch,
A1 - Magdy S. Abadir,
PY - 2001
VL - 18
JA - IEEE Design and Test of Computers
ER -
 

Prudent application of design-for-testability guidelines can yield designs that don't require all the expensive features of traditional automated test equipment. The authors describe how the VLSI design and semiconductor test communities can cooperate to greatly reduce testing costs.

Citation:
Jay Bedsole, Rajesh Raina, Al Crouch, Magdy S. Abadir, "Very Low Cost Testers: Opportunities and Challenges," IEEE Design and Test of Computers, vol. 18, no. 5, pp. 60-69, Sep./Oct. 2001, doi:10.1109/54.953273
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