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Design and Development Paradigm for Industrial Formal Verification CAD Tools
July/August 2001 (vol. 18 no. 4)
pp. 26-35
ASCII Text
x 
 
Narayanan Krishnamurthy, Magdy S. Abadir, Andrew K. Martin, Jacob A. Abraham, "Design and Development Paradigm for Industrial Formal Verification CAD Tools," IEEE Design and Test of Computers, vol. 18, no. 4, pp. 26-35, July/August, 2001.
 
 
BibTex
x
 
@article{ 10.1109/54.936246,
author = {Narayanan Krishnamurthy and Magdy S. Abadir and Andrew K. Martin and Jacob A. Abraham},
title = {Design and Development Paradigm for Industrial Formal Verification CAD Tools},
journal ={IEEE Design and Test of Computers},
volume = {18},
number = {4},
issn = {0740-7475},
year = {2001},
pages = {26-35},
doi = {http://doi.ieeecomputersociety.org/10.1109/54.936246},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Design and Test of Computers
TI - Design and Development Paradigm for Industrial Formal Verification CAD Tools
IS - 4
SN - 0740-7475
SP26
EP35
EPD - 26-35
A1 - Narayanan Krishnamurthy,
A1 - Magdy S. Abadir,
A1 - Andrew K. Martin,
A1 - Jacob A. Abraham,
PY - 2001
VL - 18
JA - IEEE Design and Test of Computers
ER -
 
CAD tool designers have given priority to providing features that will let circuit and logic designers use this custom-memory formal verification and analysis tool without a steep learning curve.
Citation:
Narayanan Krishnamurthy, Magdy S. Abadir, Andrew K. Martin, Jacob A. Abraham, "Design and Development Paradigm for Industrial Formal Verification CAD Tools," IEEE Design and Test of Computers, vol. 18, no. 4, pp. 26-35, July/Aug. 2001, doi:10.1109/54.936246
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