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Software Energy Reduction Techniques for Variable-Voltage Processors
March/April 2001 (vol. 18 no. 2)
pp. 31-41
ASCII Text
x 
 
Takanori Okuma, Hiroto Yasuura, Tohru Ishihara, "Software Energy Reduction Techniques for Variable-Voltage Processors," IEEE Design and Test of Computers, vol. 18, no. 2, pp. 31-41, March/April, 2001.
 
 
BibTex
x
 
@article{ 10.1109/54.914613,
author = {Takanori Okuma and Hiroto Yasuura and Tohru Ishihara},
title = {Software Energy Reduction Techniques for Variable-Voltage Processors},
journal ={IEEE Design and Test of Computers},
volume = {18},
number = {2},
issn = {0740-7475},
year = {2001},
pages = {31-41},
doi = {http://doi.ieeecomputersociety.org/10.1109/54.914613},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Design and Test of Computers
TI - Software Energy Reduction Techniques for Variable-Voltage Processors
IS - 2
SN - 0740-7475
SP31
EP41
EPD - 31-41
A1 - Takanori Okuma,
A1 - Hiroto Yasuura,
A1 - Tohru Ishihara,
PY - 2001
VL - 18
JA - IEEE Design and Test of Computers
ER -
 
A processor consumes far less energy running tasks requiring a low supply voltage than it does executing high-performance tasks. Effective voltage-scheduling techniques take advantage of this situation by using software to dynamically vary supply voltages, thereby minimizing energy consumption and accommodating timing constraints.
Citation:
Takanori Okuma, Hiroto Yasuura, Tohru Ishihara, "Software Energy Reduction Techniques for Variable-Voltage Processors," IEEE Design and Test of Computers, vol. 18, no. 2, pp. 31-41, Mar./Apr. 2001, doi:10.1109/54.914613
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