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Semicustom Design of an IEEE 1394-Compliant Reusable IC Core
July-September 2000 (vol. 17 no. 3)
pp. 95-105
ASCII Text
x 
 
Mauro Bertacchi, Alessandro De Gloria, Daniele Grosso, Mauro Olivieri, "Semicustom Design of an IEEE 1394-Compliant Reusable IC Core," IEEE Design and Test of Computers, vol. 17, no. 3, pp. 95-105, July-September, 2000.
 
 
BibTex
x
 
@article{ 10.1109/54.867900,
author = {Mauro Bertacchi and Alessandro De Gloria and Daniele Grosso and Mauro Olivieri},
title = {Semicustom Design of an IEEE 1394-Compliant Reusable IC Core},
journal ={IEEE Design and Test of Computers},
volume = {17},
number = {3},
issn = {0740-7475},
year = {2000},
pages = {95-105},
doi = {http://doi.ieeecomputersociety.org/10.1109/54.867900},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Design and Test of Computers
TI - Semicustom Design of an IEEE 1394-Compliant Reusable IC Core
IS - 3
SN - 0740-7475
SP95
EP105
EPD - 95-105
A1 - Mauro Bertacchi,
A1 - Alessandro De Gloria,
A1 - Daniele Grosso,
A1 - Mauro Olivieri,
PY - 2000
VL - 17
JA - IEEE Design and Test of Computers
ER -
 

In 0.35-micron standard-cell CMOS technology, this IC core design supports a data rate of up to 400 Mbps and includes circuit blocks that operate at a clock frequency of 400 MHz.

Citation:
Mauro Bertacchi, Alessandro De Gloria, Daniele Grosso, Mauro Olivieri, "Semicustom Design of an IEEE 1394-Compliant Reusable IC Core," IEEE Design and Test of Computers, vol. 17, no. 3, pp. 95-105, July-Sept. 2000, doi:10.1109/54.867900
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