loading...
 This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Integrating HDL Synthesis and Partitioning for Multi-FPGA Designs
April-June 1998 (vol. 15 no. 2)
pp. 65-72
ASCII Text
x 
 
Wen-Jong Fang, Allen C.-H. Wu, "Integrating HDL Synthesis and Partitioning for Multi-FPGA Designs," IEEE Design and Test of Computers, vol. 15, no. 2, pp. 65-72, April-June, 1998.
 
 
BibTex
x
 
@article{ 10.1109/54.679209,
author = {Wen-Jong Fang and Allen C.-H. Wu},
title = {Integrating HDL Synthesis and Partitioning for Multi-FPGA Designs},
journal ={IEEE Design and Test of Computers},
volume = {15},
number = {2},
issn = {0740-7475},
year = {1998},
pages = {65-72},
doi = {http://doi.ieeecomputersociety.org/10.1109/54.679209},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Design and Test of Computers
TI - Integrating HDL Synthesis and Partitioning for Multi-FPGA Designs
IS - 2
SN - 0740-7475
SP65
EP72
EPD - 65-72
A1 - Wen-Jong Fang,
A1 - Allen C.-H. Wu,
PY - 1998
KW - HDL
KW - FPGA design
KW - synthesis
KW - partitioning
VL - 15
JA - IEEE Design and Test of Computers
ER -
 
This paper presents a study on the interaction between HDL synthesis and partitioning for multi-FPGA designs with varying structural characteristics and HDL coding styles. We propose an integrated synthesis and partitioning methodology for multi-FPGA designs and demonstrate that the proper use of integrated HDL synthesis and partitioning methods is crucial to achieving high density multi-FPGA designs.
Index Terms:
HDL, FPGA design, synthesis, partitioning
Citation:
Wen-Jong Fang, Allen C.-H. Wu, "Integrating HDL Synthesis and Partitioning for Multi-FPGA Designs," IEEE Design and Test of Computers, vol. 15, no. 2, pp. 65-72, Apr.-June 1998, doi:10.1109/54.679209
Usage of this product signifies your acceptance of the Terms of Use.