A novel test approach and circuitry suitable for built-in self-test (BIST) of digital-to-analog (D/A) and analog-to-digital (A/D) converters using static parameters are proposed. Offset, gain, integral nonlinearity (INL) and differential nonlinearity (DNL) are tested without using mixed-mode or logic test equipment. The proposed BIST structure presents a compromise between area overhead (AO), test time, and fault coverage. The BIST circuitry has been designed and evaluated using CMOS 1.2-micron technology. The simulations show that, assuming the BIST voltage references fulfill the required accuracy, the BIST structure is applicable for testing D/A and A/D converters up to 16-bits of resolution. By only a minor modification, the test structure would be able to localize the fail situation and to test all D/A converters on the same chip. The small value of AO, the simplicity and efficiency of the proposed BIST architectures seem to be promising for manufacturing.