This paper proposes a novel multiple signature analysis approach called Fuzzy Multiple Signature (FMS) analysis. Conventionally, for a circuit to be declared good, each signature from the circuit under test (CUT) must correspond to a specific reference, which makes multiple signature analysis complex and silicon-inefficient. In the FMS scheme the aforementioned one-to-one correspondence is not required. For a CUT to be declared good in this scheme, it suffices that each signature correspond to any element from a reference set. This paper includes an aliasing model, an implementation description and experimental results on fault coverage enhancement and fault simulation time savings.
Index Terms:
Built-in self-test, BIST compaction, signature analysis, multiple signature analysis
Citation:
Yuejian Wu, André Ivanov, "Reducing Hardware with Fuzzy Multiple Signature Analysis," IEEE Design and Test of Computers, vol. 12, no. 1, pp. 68-74, Mar. 1995, doi:10.1109/54.350697