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A 100-MIPS GaAs Asynchronous Microprocessor
April/June 1994 (vol. 11 no. 2)
pp. 43-49
ASCII Text
x 
 
Jose A. Tierno, Alain J. Martin, Drazen Borkovic, Tak Kwan Lee, "A 100-MIPS GaAs Asynchronous Microprocessor," IEEE Design and Test of Computers, vol. 11, no. 2, pp. 43-49, April/June, 1994.
 
 
BibTex
x
 
@article{ 10.1109/54.282444,
author = {Jose A. Tierno and Alain J. Martin and Drazen Borkovic and Tak Kwan Lee},
title = {A 100-MIPS GaAs Asynchronous Microprocessor},
journal ={IEEE Design and Test of Computers},
volume = {11},
number = {2},
issn = {0740-7475},
year = {1994},
pages = {43-49},
doi = {http://doi.ieeecomputersociety.org/10.1109/54.282444},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Design and Test of Computers
TI - A 100-MIPS GaAs Asynchronous Microprocessor
IS - 2
SN - 0740-7475
SP43
EP49
EPD - 43-49
A1 - Jose A. Tierno,
A1 - Alain J. Martin,
A1 - Drazen Borkovic,
A1 - Tak Kwan Lee,
PY - 1994
VL - 11
JA - IEEE Design and Test of Computers
ER -
 

The authors describe how they ported an asynchronous microprocessor previously implemented in CMOS to gallium arsenide, using a technology-independent asynchronous design technique. They introduce new circuits including a sense-amplifier, a completion detection circuit, and a general circuit structure for operators specified by production rules. The authors used and tested these circuits in a variety of designs.

Citation:
Jose A. Tierno, Alain J. Martin, Drazen Borkovic, Tak Kwan Lee, "A 100-MIPS GaAs Asynchronous Microprocessor," IEEE Design and Test of Computers, vol. 11, no. 2, pp. 43-49, Apr. 1994, doi:10.1109/54.282444
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