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Boundary-Scan Update: IEEE P1149.2 Description and Status Report
July/September 1992 (vol. 9 no. 3)
pp. 79-81
ASCII Text
x 
 
Bulent Dervisoglu, "Boundary-Scan Update: IEEE P1149.2 Description and Status Report," IEEE Design and Test of Computers, vol. 9, no. 3, pp. 79-81, July/September, 1992.
 
 
BibTex
x
 
@article{ 10.1109/54.156161,
author = {Bulent Dervisoglu},
title = {Boundary-Scan Update: IEEE P1149.2 Description and Status Report},
journal ={IEEE Design and Test of Computers},
volume = {9},
number = {3},
issn = {0740-7475},
year = {1992},
pages = {79-81},
doi = {http://doi.ieeecomputersociety.org/10.1109/54.156161},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Design and Test of Computers
TI - Boundary-Scan Update: IEEE P1149.2 Description and Status Report
IS - 3
SN - 0740-7475
SP79
EP81
EPD - 79-81
A1 - Bulent Dervisoglu,
PY - 1992
VL - 9
JA - IEEE Design and Test of Computers
ER -
 

The IEEE P1149.2 Working Group is developing a standard that supports boundary scan for board-level interconnect testing and supports internal scan for device- or board-level component testing. The group's overall objective is to establish minimal mandatory features that are adaptable to individual applications. P1149.2's current status and the most recent proposals being considered for the standard are described.

Citation:
Bulent Dervisoglu, "Boundary-Scan Update: IEEE P1149.2 Description and Status Report," IEEE Design and Test of Computers, vol. 9, no. 3, pp. 79-81, July 1992, doi:10.1109/54.156161
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