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Specification, Planning, and Synthesis in a VHDL Design Environment
April/June 1992 (vol. 9 no. 2)
pp. 58-68

Silicon 1076, a very-high-speed integrated circuit hardware description language (VHDL) design environment developed for specifying, simulating, and synthesizing digital hardware, is described. The environment integrates software tools for architectural-level design space exploration and synthesis and RTL synthesis. Silicon 1076 supports a top-down design methodology, while making use of bottom-up design information such as area and delay of modules and interconnect and routing estimates. The flexible design environment allows the user to describe separate parts of the design at different abstraction levels and to perform mixed-level VHDL simulation and synthesis. With the synthesis tools, the user can perform high-level what-if analysis and planning by constraining and exploring portions of the design space.

Citation:
VIjay Nagasamy, Neerav Berry, Carlos Dangelo, "Specification, Planning, and Synthesis in a VHDL Design Environment," IEEE Design and Test of Computers, vol. 9, no. 2, pp. 58-68, Apr. 1992, doi:10.1109/54.143146
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