loading...
 This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
VHDL: Toward a Unified View of Design
April/June 1992 (vol. 9 no. 2)
pp. 8-17

A high-level view of the relevance of and relationships between key events in the development of the very-high-speed integrated circuit (VHSIC) hardware description language (VHDL) is presented. Three phases in the life cycle of the language, the definition, development, and deployment phases, are outlined. The concept of a design information space, a convenient abstraction for categorizing various VHDL efforts and understanding their interrelationships, is introduced. Two representative VHDL examples dealing with performance modeling and testing are discussed. The waveform and vector exchange specification (WAVES) VHDL subset for the exchange of waveform descriptions is described.

Citation:
Allen Dewey, Aart J. de Geus, "VHDL: Toward a Unified View of Design," IEEE Design and Test of Computers, vol. 9, no. 2, pp. 8-17, Apr. 1992, doi:10.1109/54.143142
Usage of this product signifies your acceptance of the Terms of Use.