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A Pipelined Image Analysis System Using Custom Integrated Circuits
January 1988 (vol. 10 no. 1)
pp. 110-116
ASCII Text
x 
 
E. Persoon, "A Pipelined Image Analysis System Using Custom Integrated Circuits," IEEE Transactions on Pattern Analysis and Machine Intelligence, vol. 10, no. 1, pp. 110-116, January, 1988.
 
 
BibTex
x
 
@article{ 10.1109/34.3874,
author = {E. Persoon},
title = {A Pipelined Image Analysis System Using Custom Integrated Circuits},
journal ={IEEE Transactions on Pattern Analysis and Machine Intelligence},
volume = {10},
number = {1},
issn = {0162-8828},
year = {1988},
pages = {110-116},
doi = {http://doi.ieeecomputersociety.org/10.1109/34.3874},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - JOUR
JO - IEEE Transactions on Pattern Analysis and Machine Intelligence
TI - A Pipelined Image Analysis System Using Custom Integrated Circuits
IS - 1
SN - 0162-8828
SP110
EP116
EPD - 110-116
A1 - E. Persoon,
PY - 1988
KW - pipelined image analysis system; custom integrated circuits; computer vision system; iconic image-processing; shape recognition; mask generation; programmable image delay; subsample filtering; computer vision; computerised picture processing; digital integrated circuits; pipeline processing
VL - 10
JA - IEEE Transactions on Pattern Analysis and Machine Intelligence
ER -
 

The requirements of a computer vision system in relation to industrial applications are studied. It is concluded that for the iconic image-processing part, a pipeline system built around a custom integrated circuit is preferred. This custom integrated circuit makes it possible to realize four basic operations in a compact way: shape recognition, mask generation, programmable image delay, and subsample filtering. An example that has been processed by a hardware realization of such a pipeline system is provided.

[1] M. J. M. Pelgrom, H. E. J. Wulms, P. van der Stokker, and R. Bergamaschi, "Febris, a chip for pattern recognition,"IEEE J. Solid-State Circuits, Vol. SC-22, June 1987.
[2] E. Persoon, "Hierarchical correlation for fast industrial object location," inPattern Recognition in Practice 2, E. S. Gelsema and L. Kanal, Eds. Ansterdam, The Netherlands: North-Holland, 1985.
[3] E. Persoon, "Learning algorithms applied to the processing of industrial images," inPattern Recognition in Practice, E. S. Gelsema and L. Kanal, Eds. Amsterdam, The Netherlands: North-Holland, 1980.
[4] F. L. Thissen, "The Philips modular picture aquisition and processing system--PAPS," presented at ROVISEC 5, 5th Int. Conf. Robot Vision and Sensory Controls, Amsterdam, The Netherlands, 1985.
[5] R. M. Haralick, "Digital step edges from zero crossings of second order directional derivatives,"IEEE Trans. Pattern Anal. Machine Intell., vol. PAMI-6, no. 1, pp. 58-68, 1984.
[6] Sessions on VLSI for image processing, presented at the Int. Conf. Acoust., Speech, Signal Processing (ICASSP 86), Tokyo, Japan.
[7] J. Bernsen, "Dynamic thresholding of grey-level images," inProc. 8th Int. Con. Pattern Recognition, Paris, France, 1986, pp. 1251-1255.
[8] P. A. Ruetzet al., "A custom chip set for real-time image processing," inProc. ICASSP 86, pp. 801-804.

Index Terms:
pipelined image analysis system; custom integrated circuits; computer vision system; iconic image-processing; shape recognition; mask generation; programmable image delay; subsample filtering; computer vision; computerised picture processing; digital integrated circuits; pipeline processing
Citation:
E. Persoon, "A Pipelined Image Analysis System Using Custom Integrated Circuits," IEEE Transactions on Pattern Analysis and Machine Intelligence, vol. 10, no. 1, pp. 110-116, Jan. 1988, doi:10.1109/34.3874
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