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IEEE Transactions on Computers
April 2003 (vol. 52 no. 4)
ISSN: 0018-9340
Table of Contents
SPECIAL SECTION ON CRYPTOGRAPHIC HARDWARE AND EMBEDDED SYSTEMS
Guest Editors? Introduction to the Special Section on Cryptographic Hardware and Embedded Systems
(HTML)
Çetin K. Koç
, IEEE
Christof Paar
, IEEE
pp. 401-402
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A High-Speed Oscillator-Based Truly Random Number Source for Cryptographic Applications on a Smart Card IC
(Abstract)
Marco Bucci
Lucia Germani
Raimondo Luzzi
, IEEE
Alessandro Trifiletti
Mario Varanonuovo
, IEEE
pp. 403-409
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Efficient Implementation of Cryptographically Useful 'Large' Boolean Functions
(Abstract)
Palash Sarkar
Subhamoy Maitra
pp. 410-417
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Low Complexity Multiplication in a Finite Field Using Ring Representation
(Abstract)
Rajendra Katti
, IEEE
Joseph Brennan
pp. 418-427
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Efficient Multiplication Beyond Optimal Normal Bases
(Abstract)
Arash Reyhani-Masoleh
, IEEE
M. Anwar Hasan
, IEEE
pp. 428-439
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Achieving NTRU with Montgomery Multiplication
(Abstract)
Colleen O'Rourke
Berk Sunar
, IEEE
pp. 440-448
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A Scalable Dual-Field Elliptic Curve Cryptographic Processor
(Abstract)
Akashi Satoh
Kohji Takano
pp. 449-460
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RSA Speedup with Chinese Remainder Theorem Immune against Hardware Fault Cryptanalysis
(Abstract)
Sung-Ming Yen
Seungjoo Kim
Seongan Lim
Sang-Jae Moon
pp. 461-472
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Efficient Uses of FPGAs for Implementations of DES and Its Experimental Linear Cryptanalysis
(Abstract)
Gaël Rouvroy
, IEEE
Francois-Xavier Standaert
, IEEE
Jean-Jacques Quisquater
, IEEE
Jean-Didier Legat
, IEEE
pp. 473-482
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A Highly Regular and Scalable AES Hardware Architecture
(Abstract)
Stefan Mangard
, IEEE
Manfred Aigner
Sandra Dominikus
pp. 483-491
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Error Analysis and Detection Procedures for a Hardware Implementation of the Advanced Encryption Standard
(Abstract)
Guido Bertoni
Luca Breveglieri
Israel Koren
, IEEE
Paolo Maistri
Vincenzo Piuri
, IEEE
pp. 492-505
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REGULAR PAPERS
Two-Version Based Concurrency Control and Recovery in Real-Time Client/Server Databases
(Abstract)
Tei-Wei Kuo
, IEEE
Yuan-Ting Kao
Chin-Fu Kuo
pp. 506-524
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What Designers of Bus and Network Architectures Should Know about Hypercubes
(Abstract)
Laurence E. LaForge
, IEEE
Kirk F. Korver
, IEEE
M. Sami Fadali
, IEEE
pp. 525-544
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