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IEEE Workshop on Software Technologies for Future Embedded Systems
Avoiding Timing Problems in Real-Time Software
Hakodate, Hokkaido, Japan
May 15-May 16
ISBN: 0-7695-1937-7
Peter Puschner, Technische Universit?t Wien
Raimund Kirner, Technische Universit?t Wien
To safely establish the correct timing of a real-time processing node, adequate architectural structures have to be used. This refers to the hardware architecture of the processing node as well as the software architecture of its operating system and application software.
This paper presents architectures that allow for a well structured and simple timing analysis. First, it presents solutions for cleanly splitting the overall timing analysis into schedulability analysis and task worst-case execution time analysis. Second, it presents a programming strategy that yields software that is highly temporally predictable and easy to analyze for its worst-case execution time.
Citation:
Peter Puschner, Raimund Kirner, "Avoiding Timing Problems in Real-Time Software," wstfes, pp.75, IEEE Workshop on Software Technologies for Future Embedded Systems, 2003
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