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IEEE Workshop on Software Technologies for Future Embedded Systems
Hakodate, Hokkaido, Japan
May 15-May 16
ISBN: 0-7695-1937-7
Jinggang Wang, Virginia Tech
Binoy Ravindran, Virginia Tech
Tom Martin, Virginia Tech
In this paper, we present a power-aware, best- effort real-time task scheduling algorithm called PA-BTA that optimizes real-time performance and power consumption. The algorithm considers a timeliness model where task timing constraints are described using Jensen?s benefit functions and a system-level power model. We propose a metric called "Energy and Real-Time Performance Grade" (ERG) to measure real-time performance and power consumption in a unified way. Since the scheduling problem is NP-hard, PA-BTA heuristically computes schedules to maximize ERG, incurring a worst-case computational cost of O(n2). Our simulation results indicate that the algorithm performs close to the optimal algorithm and better than other algorithms considered in the study.
Citation:
Jinggang Wang, Binoy Ravindran, Tom Martin, "A Power-Aware, Best-Effort Real-Time Task Scheduling Algorithm," wstfes, pp.21, IEEE Workshop on Software Technologies for Future Embedded Systems, 2003
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