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22nd IEEE VLSI Test Symposium
Generalized Sensitization using Fault Tuples
Napa Valley, California
April 25-April 29
ISBN: 0-7695-2134-7
Sounil Biswas, Carnegie Mellon University, Pittsburgh, PA
Kumar N. Dwarakanath, Carnegie Mellon University, Pittsburgh, PA
R. D. (Shawn) Blanton, Carnegie Mellon University, Pittsburgh, PA
Fault tuples have introduced a fault model independent methodology for digital circuit test analysis. However, the {0, 1, X} algebra currently used with fault tuples allows only one form of path sensitization. The sensitization options for fault tuples is enhanced based on a 5-value algebra. The 5-value algebra enables a more detailed test analysis through the selection of one of three types of sensitization. Simulation experiments performed using the ITC'99 benchmark circuits for transition and path delay faults reveal that faults can be simultaneously analyzed under different types of sensitization criteria with little increase in memory and CPU time.
Index Terms:
Fault simulation, fault model, multiple path sensitization, robust test, hazard-free test
Citation:
Sounil Biswas, Kumar N. Dwarakanath, R. D. (Shawn) Blanton, "Generalized Sensitization using Fault Tuples," vts, pp.297, 22nd IEEE VLSI Test Symposium, 2004
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