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22nd IEEE VLSI Test Symposium
Delay Defect Screening using Process Monitor Structures
Napa Valley, California
April 25-April 29
ISBN: 0-7695-2134-7
Subhasish Mitra, Intel Corporating, Sacramento, CA; Stanford University, CA
Erik Volkerink, Stanford University, CA
Edward J. McCluskey, Stanford University, CA
Stefan Eichenberger, Philips Semiconductors, Nijmegen, The Netherlands
This paper presents delay test data collected from test chips fabricated in a 0.18μ technology. The experimental data shows that process monitor structures such as on-chip ring oscillators are effective in identifying slow parts while performing transition fault testing at frequencies slower than the rated frequency.
Citation:
Subhasish Mitra, Erik Volkerink, Edward J. McCluskey, Stefan Eichenberger, "Delay Defect Screening using Process Monitor Structures," vts, pp.43, 22nd IEEE VLSI Test Symposium, 2004
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