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21st IEEE VLSI Test Symposium
The Impact of NoC Reuse on the Testing of Core-based Systems
Napa Valley, California
April 27-May 01
ISBN: 0-7695-1924-5
ASCII Text
x 
 
E. Cota, M. Kreutz, C.A. Zeferino, L. Carro, M. Lubaszewski, A. Susin, "The Impact of NoC Reuse on the Testing of Core-based Systems," VLSI Test Symposium, IEEE, pp. 128, 21st IEEE VLSI Test Symposium, 2003.
 
 
BibTex
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@article{ 10.1109/VTEST.2003.1197643,
author = {E. Cota and M. Kreutz and C.A. Zeferino and L. Carro and M. Lubaszewski and A. Susin},
title = {The Impact of NoC Reuse on the Testing of Core-based Systems},
journal ={VLSI Test Symposium, IEEE},
volume = {0},
year = {2003},
issn = {1093-0167},
pages = {128},
doi = {http://doi.ieeecomputersociety.org/10.1109/VTEST.2003.1197643},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - VLSI Test Symposium, IEEE
TI - The Impact of NoC Reuse on the Testing of Core-based Systems
SN - 1093-0167
SP
EP
A1 - E. Cota,
A1 - M. Kreutz,
A1 - C.A. Zeferino,
A1 - L. Carro,
A1 - M. Lubaszewski,
A1 - A. Susin,
PY - 2003
KW - null
VL - 0
JA - VLSI Test Symposium, IEEE
ER -
 
E. Cota, PPGC - Inst. de Inform?tica
M. Kreutz, PPGC - Inst. de Inform?tica
C.A. Zeferino, PPGC - Inst. de Inform?tica; Centro de Ci?ncias Tecnol?gicas da Terra e do Mar - Univali
L. Carro, PPGC - Inst. de Inform?tica; PPGEE - Depto. Engenharia El?trica
M. Lubaszewski, PPGC - Inst. de Inform?tica; PPGEE - Depto. Engenharia El?trica
A. Susin, PPGC - Inst. de Inform?tica; PPGEE - Depto. Engenharia El?trica
The authors propose the reuse of on-chip networks for the test of core-based systems that use this platform. Two possibilities of reuse are proposed and discussed with respect to test time minimization. An algorithm exploiting network characteristics to reduce test time is presented. Experimental results show that the parallelization capability of the network can be exploited to reduce the system test time, whereas area and pin overhead are strongly minimized.
Citation:
E. Cota, M. Kreutz, C.A. Zeferino, L. Carro, M. Lubaszewski, A. Susin, "The Impact of NoC Reuse on the Testing of Core-based Systems," vts, pp.128, 21st IEEE VLSI Test Symposium, 2003
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