loading...
 This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
20th IEEE VLSI Test Symposium
Layout Analysis to Extract Open Nets Caused by Systematic Failure Mechanisms
Monterey, California
April 28-May 02
ISBN: 0-7695-1570-3
ASCII Text
x 
 
Sreejit Chakravarty, Kambiz Komeyli, Eric W. Savage, Michael J. Carruthers, Bret T. Stastny, Sujit T. Zachariah, "Layout Analysis to Extract Open Nets Caused by Systematic Failure Mechanisms," VLSI Test Symposium, IEEE, pp. 0367, 20th IEEE VLSI Test Symposium, 2002.
 
 
BibTex
x
 
@article{ 10.1109/VTS.2002.1011166,
author = {Sreejit Chakravarty and Kambiz Komeyli and Eric W. Savage and Michael J. Carruthers and Bret T. Stastny and Sujit T. Zachariah},
title = {Layout Analysis to Extract Open Nets Caused by Systematic Failure Mechanisms},
journal ={VLSI Test Symposium, IEEE},
volume = {0},
year = {2002},
isbn = {0-7695-1570-3},
pages = {0367},
doi = {http://doi.ieeecomputersociety.org/10.1109/VTS.2002.1011166},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - VLSI Test Symposium, IEEE
TI - Layout Analysis to Extract Open Nets Caused by Systematic Failure Mechanisms
SN - 0-7695-1570-3
SP
EP
A1 - Sreejit Chakravarty,
A1 - Kambiz Komeyli,
A1 - Eric W. Savage,
A1 - Michael J. Carruthers,
A1 - Bret T. Stastny,
A1 - Sujit T. Zachariah,
PY - 2002
VL - 0
JA - VLSI Test Symposium, IEEE
ER -
 
Sreejit Chakravarty, Intel Corporation
Kambiz Komeyli, Intel Corporation
Eric W. Savage, Intel Corporation
Michael J. Carruthers, Intel Corporation
Bret T. Stastny, Intel Corporation
Sujit T. Zachariah, Intel Corporation
Published work have pointed out that open defects are escaping test screens. To plug this test hole tests directed at nets susceptible to opens are required. For that nets susceptible to opens need to be identified. Opens caused by random particles have been modeled using weighted critical area (WCA) and have been previously studied. Here we present a model that abstracts a class of systematic failure mechanisms that leads to open nets. An algorithm to calculate net scores using this model is presented. Experimental results on industrial designs show the algorithm to have reasonable performance.
Citation:
Sreejit Chakravarty, Kambiz Komeyli, Eric W. Savage, Michael J. Carruthers, Bret T. Stastny, Sujit T. Zachariah, "Layout Analysis to Extract Open Nets Caused by Systematic Failure Mechanisms," vts, pp.0367, 20th IEEE VLSI Test Symposium, 2002
Usage of this product signifies your acceptance of the Terms of Use.