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20th IEEE VLSI Test Symposium
Yield-Reliability Modeling: Experimental Verification and Application to Burn-In Reduction
Monterey, California
April 28-May 02
ISBN: 0-7695-1570-3
Thomas S. Barnett, Auburn University
Adit D. Singh, Auburn University
Matt Grady, IBM Microelectronics
Kathleen Purdy, IBM Microelectronics
An integrated yield-reliability model is verified using burn-in data from 77,000 microprocessor units manufactured by IBM Microelectonics. The model is based on the fact that defects over semiconductor wafers are not randomly distributed, but have a tendency to cluster. It is shown that this fact can be exploited to produce die of varying reliability by sorting die into bins based on how many of their neighbors test faulty. Die that test good at wafer probe, yet come from regions with many faulty die, have a higher incidence of infant mortality failure than die from regions with few faulty die. The yield-reliability model is used to predict the fraction of good die in each bin following wafer probe as well as the fraction of failures in each bin following stress testing (e.g. burn-in). Results show excellent agreement between model predictions and observed data.
Citation:
Thomas S. Barnett, Adit D. Singh, Matt Grady, Kathleen Purdy, "Yield-Reliability Modeling: Experimental Verification and Application to Burn-In Reduction," vts, pp.0075, 20th IEEE VLSI Test Symposium, 2002
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