Test Generation for Maximizing Ground Bounce for Internal Circuitry with Reconvergent Fan-outs

V
VTS
2001
19th IEEE VLSI Test Symposium
Abstract - Test Generation for Maximizing Ground Bounce for Internal Circuitry with Reconvergent Fan-outs

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19th IEEE VLSI Test Symposium

Marina Del Rey, CA

March 29-April 03

ISBN: 0-7695-1122-8

	ASCII Text	x
	Yi-Shing Chang, Sandeep Gupta, Melvin Breuer, "Test Generation for Maximizing Ground Bounce for Internal Circuitry with Reconvergent Fan-outs," VLSI Test Symposium, IEEE, pp. 0358, 19th IEEE VLSI Test Symposium, 2001.

	BibTex	x
	@article{ 10.1109/VTS.2001.923463, author = {Yi-Shing Chang and Sandeep Gupta and Melvin Breuer}, title = {Test Generation for Maximizing Ground Bounce for Internal Circuitry with Reconvergent Fan-outs}, journal ={VLSI Test Symposium, IEEE}, volume = {0}, year = {2001}, isbn = {0-7695-1122-8}, pages = {0358}, doi = {http://doi.ieeecomputersociety.org/10.1109/VTS.2001.923463}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI Test Symposium, IEEE TI - Test Generation for Maximizing Ground Bounce for Internal Circuitry with Reconvergent Fan-outs SN - 0-7695-1122-8 SP EP A1 - Yi-Shing Chang, A1 - Sandeep Gupta, A1 - Melvin Breuer, PY - 2001 VL - 0 JA - VLSI Test Symposium, IEEE ER -

Yi-Shing Chang, University of Southern California

Sandeep Gupta, University of Southern California

Melvin Breuer, University of Southern California

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/VTS.2001.923463

Due to technology scaling and increasing clock rate, problems due to noise effects lead to an increase in design and test efforts and a decrease in circuit performance. This paper addresses the problem of efficiently and effectively generating two vector tests to produce the maximum ground bounce in a circuit. We have developed a branch and bound procedure that can find a good quality test for maximum ground bounce in a rather short time. Comparison of results with SPICE simulations confirms the quality of tests obtained by our procedure.

Citation:

Yi-Shing Chang, Sandeep Gupta, Melvin Breuer, "Test Generation for Maximizing Ground Bounce for Internal Circuitry with Reconvergent Fan-outs," vts, pp.0358, 19th IEEE VLSI Test Symposium, 2001

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