Enabling Embedded Memory Diagnosis via Test Response Compression

	This Article
	Subscribers, please Login Purchase article: $19 PDF IEEE Xplore Subscribers RSS feed
	Share
	Email this Article to a friend
	Bibliographic References
	ASCII Text BibTex RefWorks Procite/RefMan/Endnote
	Add to:
	Digg Furl Spurl Blink Simpy Google Del.icio.us Y!MyWeb
	Search
	Similar Articles Articles by John T. Chen Articles by Wojciech Maly Articles by Janusz Rajski Articles by Omar Kebichi Articles by Jitendra Khare

19th IEEE VLSI Test Symposium

Marina Del Rey, CA

March 29-April 03

ISBN: 0-7695-1122-8

	ASCII Text	x
	John T. Chen, Wojciech Maly, Janusz Rajski, Omar Kebichi, Jitendra Khare, "Enabling Embedded Memory Diagnosis via Test Response Compression," VLSI Test Symposium, IEEE, pp. 0292, 19th IEEE VLSI Test Symposium, 2001.

	BibTex	x
	@article{ 10.1109/VTS.2001.923452, author = {John T. Chen and Wojciech Maly and Janusz Rajski and Omar Kebichi and Jitendra Khare}, title = {Enabling Embedded Memory Diagnosis via Test Response Compression}, journal ={VLSI Test Symposium, IEEE}, volume = {0}, year = {2001}, isbn = {0-7695-1122-8}, pages = {0292}, doi = {http://doi.ieeecomputersociety.org/10.1109/VTS.2001.923452}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI Test Symposium, IEEE TI - Enabling Embedded Memory Diagnosis via Test Response Compression SN - 0-7695-1122-8 SP EP A1 - John T. Chen, A1 - Wojciech Maly, A1 - Janusz Rajski, A1 - Omar Kebichi, A1 - Jitendra Khare, PY - 2001 KW - BIST KW - diagnosis KW - RAM testing KW - bitmap KW - process monitoring KW - memory repair. VL - 0 JA - VLSI Test Symposium, IEEE ER -

John T. Chen, Carnegie Mellon University

Wojciech Maly, Carnegie Mellon University

Janusz Rajski, Mentor Graphics Corporation

Omar Kebichi, Mentor Graphics Corporation

Jitendra Khare, Intel Corporation-Sacramento

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/VTS.2001.923452

This paper introduces a method that enables failure diagnosis of BISTed memories by compression of test responses. This method has been tested by simulation of memories with various specifications, fail patterns and test algorithms. The proposed method has been implemented in 0.18 CMOS IC.

Index Terms:

BIST, diagnosis, RAM testing, bitmap, process monitoring, memory repair.

Citation:

John T. Chen, Wojciech Maly, Janusz Rajski, Omar Kebichi, Jitendra Khare, "Enabling Embedded Memory Diagnosis via Test Response Compression," vts, pp.0292, 19th IEEE VLSI Test Symposium, 2001

Peer Review Notice | Give Us Feedback

Usage of this product signifies your acceptance of the Terms of Use.