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19th IEEE VLSI Test Symposium
Marina Del Rey, CA
March 29-April 03
ISBN: 0-7695-1122-8
ASCII Text
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"Yield Optimization and Its Relation to Test," VLSI Test Symposium, IEEE, pp. 0281, 19th IEEE VLSI Test Symposium, 2001.
 
 
BibTex
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@article{ 10.1109/VTS.2001.10008,
author = {},
title = {Yield Optimization and Its Relation to Test},
journal ={VLSI Test Symposium, IEEE},
volume = {0},
year = {2001},
isbn = {0-7695-1122-8},
pages = {0281},
doi = {http://doi.ieeecomputersociety.org/10.1109/VTS.2001.10008},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - VLSI Test Symposium, IEEE
TI - Yield Optimization and Its Relation to Test
SN - 0-7695-1122-8
SP
EP
PY - 2001
VL - 0
JA - VLSI Test Symposium, IEEE
ER -
 
Citation:
"Yield Optimization and Its Relation to Test," vts, pp.0281, 19th IEEE VLSI Test Symposium, 2001
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