loading...
 This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
19th IEEE VLSI Test Symposium
An Efficient Methodology for Generating Optimal and Uniform March Tests
Marina Del Rey, CA
March 29-April 03
ISBN: 0-7695-1122-8
Sultan M. Al-Harbi, University of Southern California
Sandeep K. Gupta, University of Southern California
A large number of march tests that provide different fault coverages have been published and a few methodologies have been presented for automatically generating march tests. This paper presents a new methodology for generating optimal and uniform march tests. The new methodology uses a compact representation of faults, generates necessary and sufficient conditions for their detection, and generates tests using the conditions along with the properties of march tests. The methodology is demonstrated as being more efficient than those previously presented. It has been used to (a) generate new optimal tests that are uniform, which are desired to simplify BIST architecture, (b) prove the optimality of some well-known tests such as March C-, and (c) generate a complete set of optimal march tests for different combinations of faults. The proposed approach hence provides memory manufacturers with an optimal test to cover the types of faults that are likely to occur in their memories.
Citation:
Sultan M. Al-Harbi, Sandeep K. Gupta, "An Efficient Methodology for Generating Optimal and Uniform March Tests," vts, pp.0231, 19th IEEE VLSI Test Symposium, 2001
Usage of this product signifies your acceptance of the Terms of Use.