Efficient Neighborhood Pattern-Sensitive Fault Test Algorithms for Semiconductor Memories

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19th IEEE VLSI Test Symposium

Marina Del Rey, CA

March 29-April 03

ISBN: 0-7695-1122-8

	ASCII Text	x
	Kuo-Liang Cheng, Ming-Fu Tsai, Cheng-Wen Wu, "Efficient Neighborhood Pattern-Sensitive Fault Test Algorithms for Semiconductor Memories," VLSI Test Symposium, IEEE, pp. 0225, 19th IEEE VLSI Test Symposium, 2001.

	BibTex	x
	@article{ 10.1109/VTS.2001.923443, author = {Kuo-Liang Cheng and Ming-Fu Tsai and Cheng-Wen Wu}, title = {Efficient Neighborhood Pattern-Sensitive Fault Test Algorithms for Semiconductor Memories}, journal ={VLSI Test Symposium, IEEE}, volume = {0}, year = {2001}, isbn = {0-7695-1122-8}, pages = {0225}, doi = {http://doi.ieeecomputersociety.org/10.1109/VTS.2001.923443}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI Test Symposium, IEEE TI - Efficient Neighborhood Pattern-Sensitive Fault Test Algorithms for Semiconductor Memories SN - 0-7695-1122-8 SP EP A1 - Kuo-Liang Cheng, A1 - Ming-Fu Tsai, A1 - Cheng-Wen Wu, PY - 2001 VL - 0 JA - VLSI Test Symposium, IEEE ER -

Kuo-Liang Cheng, National Tsing Hua University

Ming-Fu Tsai, National Tsing Hua University

Cheng-Wen Wu, National Tsing Hua University

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/VTS.2001.923443

We present two memory test algorithms for neighborhood pattern sensitive faults (NPSFs), including Static NPSF (SNPSF), passive NPSF (PNPSF) and active NPSF (ANPSF). March algorithms are widely used in memory testing because of their linear time complexity and ease in built-in self-test (BIST) implementation. Although conventional March algorithms do not generate all neighborhood patterns for testing the NPSFs, they can be modified by using multiple data backgrounds such that all neighborhood patterns can be generated. The proposed multi-background March algorithms have shorter test length than previously proposed ones (68N for detecting SNPSFs and PNPSFs and 96N for detecting all NPSFs). Also, based on the proposed algorithms, linear-time BIST circuit can be implemented with low area overhead.

Citation:

Kuo-Liang Cheng, Ming-Fu Tsai, Cheng-Wen Wu, "Efficient Neighborhood Pattern-Sensitive Fault Test Algorithms for Semiconductor Memories," vts, pp.0225, 19th IEEE VLSI Test Symposium, 2001

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