A BIST-based design-for-test method targeting correlation in circuit behaviors is proposed. Correlation introduced by reconvergent fanout and conditional statements is considered. Testability problems caused by correlation are described and behavioral modification techniques to implicitly break the correlation are presented. An analysis and insertion scheme is proposed that systematically identifies testability problems in a circuit and modifies the circuit to resolve these problems. Experimental results from five examples show that this scheme improves the fault coverage of circuits with correlated signals while minimizing the impact on area and critical delay.