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19th IEEE VLSI Test Symposium
Hybrid BIST Based on Weighted Pseudo-Random Testing: A New Test Resource Partitioning Scheme
Marina Del Rey, CA
March 29-April 03
ISBN: 0-7695-1122-8
Abhijit Jas, University of Texas, Austin
C.V. Krishna, University of Texas, Austin
Nur A. Touba, University of Texas, Austin
This paper presents a new test resource partitioning scheme that is a hybrid approach between external testing and BIST. It reduces tester storage requirements and tester bandwidth requirements by orders of magnitude compared to conventional external testing, but requires much less area overhead than a full BIST implementation providing the same fault coverage. The proposed approach is based on weighted pseudo-random testing and uses a novel approach for compressing and storing the weight sets. Three levels of compression are used to greatly reduce test costs. No test points or any modifications are made to the function logic. The proposed scheme requires adding only a small amount of additional hardware to the STUMPS architecture. Experimental results comparing the proposed approach with other approaches are presented.
Citation:
Abhijit Jas, C.V. Krishna, Nur A. Touba, "Hybrid BIST Based on Weighted Pseudo-Random Testing: A New Test Resource Partitioning Scheme," vts, pp.0002, 19th IEEE VLSI Test Symposium, 2001
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