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18th IEEE VLSI Test Symposium (VTS'00)
Fault Escapes in Duplex Systems
Montreal, Canada
April 30-May 04
ISBN: 0-7695-0613-5
Subhasish Mitra, Stanford University
Nirmal R. Saxena, Stanford University
Edward J. McCluskey, Stanford University
Hardware duplication techniques are widely used for concurrent error detection in dependable systems to ensure high availability and data integrity. These techniques are vulnerable to common-mode failures (CMFs). Use of duplex systems with diverse implementations of the two modules has been proposed in the past for protection against CMFs. In this paper, we define a category of faults, called non-self-testable faults that undermine the data integrity of dependable systems. These faults produce identical errors at the outputs of the two modules of a duplex system and can potentially be caused by CMFs.The main contributions of this paper are: (1) techniques that identify non-self-testable faults in duplex systems, and (2) design methods that reduce the number of non-self-testable faults by test point insertion. We show that our algorithm for identifying non-self-testable faults runs orders of magnitude faster than exact techniques with minimal loss of accuracy. Also, there is a significant reduction in the number of test points required for duplex systems with diverse implementations compared to duplex systems with identical implementations. Thus, we can detect common-mode failures in diverse duplex systems using very few test points. These results are especially useful for systems with user-programmable logic elements that enhance the practicality of using diverse designs in duplex systems.
Index Terms:
Duplex systems, Common-Mode Failures (CMFs), Availability, Data Integrity, Test points, Diversity, User-programmable logic
Citation:
Subhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey, "Fault Escapes in Duplex Systems," vts, pp.453, 18th IEEE VLSI Test Symposium (VTS'00), 2000
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