18th IEEE VLSI Test Symposium (VTS'00) Montreal, Canada April 30-May 04 ISBN: 0-7695-0613-5
Fault coverage is generally defined as the number of faults detected divided by the number of potential faults. Typically, for digital circuits, the number refers to stuck-at equivalent faults, and for analog, the number refers to shorts and opens. For digital circuits, many papers have been published which show that the stuck-at model is insufficient, and other fault types have emerged including transition, IDDQ, and delay faults.Some papers have recommended detecting each fault multiple times. Other papers have shown that, for greater accuracy in predicting test escape rate, faults need to be weighted by their probability of occurrence. Unfortunately, fault weighting usually requires layout information and is therefore very compute-intensive and late in the design process. Nevertheless, better prediction of the delivered defect level or test escape rate is essential as the number of potential faults per chip increases and the list of potential fault types grows (becoming more like analog faults).For analog circuits, measuring fault coverage via the detection of shorts and opens is both insufficient and compute intensive. Several ways of measuring the detection of parametric faults have been proposed but none has been generally accepted, partly because of fault simulation inefficiency and partly because the definitions have not been (or cannot be) corroborated by experimental results.The definition of fault coverage clearly needs to be improved, but how? Any improvement needs to use acceptable definitions of catastrophic and parametric faults, account for probability of occurrence and detection, and be computable in a reasonable amount of time. Most importantly, any improved definition must lead to a more accurate prediction of the actual out-going defect level.This panel will use a new format, which is an extension of the “open microphone” discussion. In this new panel format, there are no formal panelists and attendees are encouraged to present their opinions, circuits or equations with an overhead slide which may have been prepared in advance or hand-written minutes beforehand. As always, verbal-only comments are welcomed.
Citation:
T.W. Williams, S. Sunter, "How Should Fault Coverage Be Defined?," vts, pp.325, 18th IEEE VLSI Test Symposium (VTS'00), 2000 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||