18th IEEE VLSI Test Symposium (VTS'00)
Test Selection Based on High Level Fault Simulation for Mixed-Signal Systems
Montreal, Canada
April 30-May 04
ISBN: 0-7695-0613-5
Mixed-signal design and test tools are failing to keep apace with the increasing necessity for design exploration at the early stages. We outline a methodology and toolset to enable test selection at the early design stages by providing a high-level fault simulator and associated block-level modeling and traversal capabilities. Experimental results show that the outlined methodology provides superior fault simulation speed-ups while helping to minimize the test time for a mixed-signal receiver system.